TY - GEN
T1 - A Cache/Algorithm Co-design for Parallel Real-Time Systems with Data Dependency on Multi/Many-core System-on-Chips
AU - Jiang, Zhe
AU - Zhao, Shuai
AU - Wei, Ran
AU - Gao, Yiyang
AU - Li, Jing
N1 - Publisher Copyright:
© 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.
PY - 2024/11/7
Y1 - 2024/11/7
N2 - Parallel real-time systems rely on a shared cache for dependent data transmission. A conventional shared cache suffers from intensive interference, yet existing cache management techniques only ensure determinism for single-threaded tasks. This paper introduces a virtual indexed, physically tagged, selectively-inclusive, non-exclusive L1.5 Cache, offering way-level control and fine-grained sharing capabilities. Focusing on DAG tasks, we construct a scheduling method that exploits the L1.5 Cache to reduce data transmission, hence, the makespan. As a systematical solution, we built a real system, from the SoC and the ISA to the programming model. Experiments show that our solution significantly improves the timing performance of DAG tasks with negligible overheads.
AB - Parallel real-time systems rely on a shared cache for dependent data transmission. A conventional shared cache suffers from intensive interference, yet existing cache management techniques only ensure determinism for single-threaded tasks. This paper introduces a virtual indexed, physically tagged, selectively-inclusive, non-exclusive L1.5 Cache, offering way-level control and fine-grained sharing capabilities. Focusing on DAG tasks, we construct a scheduling method that exploits the L1.5 Cache to reduce data transmission, hence, the makespan. As a systematical solution, we built a real system, from the SoC and the ISA to the programming model. Experiments show that our solution significantly improves the timing performance of DAG tasks with negligible overheads.
UR - http://www.scopus.com/inward/record.url?scp=85211178468&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85211178468&partnerID=8YFLogxK
U2 - 10.1145/3649329.3657372
DO - 10.1145/3649329.3657372
M3 - Conference contribution
AN - SCOPUS:85211178468
T3 - Proceedings - Design Automation Conference
BT - Proceedings of the 61st ACM/IEEE Design Automation Conference, DAC 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 61st ACM/IEEE Design Automation Conference, DAC 2024
Y2 - 23 June 2024 through 27 June 2024
ER -