A survey of the potential of an IrSi Schottky barrier MOSFET based on simulation studies

Schottky barrier MOSFETs are expected to offer certain fabrication advantages, low series resistance and the feasibility to go into submicron technology eliminating short-channel effects and latchup in CMOS circuits. A p-channel MOSFET using IrSi Schottky contacts as source and drain is reviewed theoretically. The limitations of the device arising from the oxide offset between source/channel is studied with the help of a 1-D simulation program SEDAN. Since the process sequence leads to an offset between source and channel, the performance of the SBMOSFETs with and without an offset is estimated using the 2-D device simulation program PISCES for PtSi or IrSi as source and drain materials. The simulation results show a considerable gain improvement for a modified device structure (i.e. without offset: gate overlapping source-drain edges). The gain of the device with an overlapping gate using PtSi and IrSi is 32 and 82% of a conventional MOSFET's gain, respectively.