An efficient expression of timestamp and period in packet-based and cell-based schedulers

D. Wei, J. Chen, N. Ansari

Research output: Contribution to journalConference articlepeer-review

3 Scopus citations


Scheduling algorithms are implemented in hardware in high-speed switches to provision Quality-of-Service guarantees in both cell-based and packet-based networks. Being able to guarantee end-to-end delay and fairness, timestamp-based fair queuing algorithms have received much attention in the past few years. In timestamp-based fair queuing algorithms, the size of timestamp and period determines the supportable rates in terms of the range and accuracy. Furthermore, it also determines the scheduler's memory, in terms of off-chip bandwidth and storage space. An efficient expression can reduce the size of the timestamp and period without compromising the accuracy, in this paper, we propose a new expression of the timestamp and period, which can be implemented in hardware for both high-speed packet-based and cell-based switches. As compared to fixed-point and floating-point number expression, when the size is fixed, the proposed expression has a better accuracy.

Original languageEnglish (US)
Pages (from-to)95-99
Number of pages5
JournalIEEE International Conference on Communications
StatePublished - 2001
EventInternational Conference on Communications (ICC2001) - Helsinki, Finland
Duration: Jun 11 2000Jun 14 2000

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Electrical and Electronic Engineering


Dive into the research topics of 'An efficient expression of timestamp and period in packet-based and cell-based schedulers'. Together they form a unique fingerprint.

Cite this