TY - GEN
T1 - An efficient synaptic architecture for artificial neural networks
AU - Boybat, Irem
AU - Gallo, Manuel Le
AU - Nandakumar, S. R.
AU - Moraitis, Timoleon
AU - Tuma, Tomas
AU - Rajendran, Bipin
AU - Leblebici, Yusuf
AU - Sebastian, Abu
AU - Eleftheriou, Evangelos
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/12/8
Y1 - 2017/12/8
N2 - Artificial neural networks (ANN) have revolutionized the field of machine learning by providing impressive human-like performance in solving real-world tasks in computer vision, speech recognition, or complex strategic games. There is a significant interest in developing non-von Neumann coprocessors for the training of ANNs, where resistive memory devices serve as synaptic elements. However, interdevice variability, limited dynamic range and resolution, nonlinearity and asymmetric switching characteristics pose important technical challenges. We investigate the use of multi-memristive synapses to overcome these challenges. We present a detailed experimental characterization of conductance changes using a phase-change memory chip fabricated in the 90nm technology node and show how multi-memrisive synapses can address the limitations of memristive devices for synaptic implementations. Simulations show that an ANN trained with backpropagation can achieve competitive classification accuracies using such a scheme.
AB - Artificial neural networks (ANN) have revolutionized the field of machine learning by providing impressive human-like performance in solving real-world tasks in computer vision, speech recognition, or complex strategic games. There is a significant interest in developing non-von Neumann coprocessors for the training of ANNs, where resistive memory devices serve as synaptic elements. However, interdevice variability, limited dynamic range and resolution, nonlinearity and asymmetric switching characteristics pose important technical challenges. We investigate the use of multi-memristive synapses to overcome these challenges. We present a detailed experimental characterization of conductance changes using a phase-change memory chip fabricated in the 90nm technology node and show how multi-memrisive synapses can address the limitations of memristive devices for synaptic implementations. Simulations show that an ANN trained with backpropagation can achieve competitive classification accuracies using such a scheme.
UR - http://www.scopus.com/inward/record.url?scp=85046730737&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85046730737&partnerID=8YFLogxK
U2 - 10.1109/NVMTS.2017.8171302
DO - 10.1109/NVMTS.2017.8171302
M3 - Conference contribution
AN - SCOPUS:85046730737
T3 - 2017 17th Non-Volatile Memory Technology Symposium, NVMTS 2017 - Conference Proceedings
SP - 1
EP - 4
BT - 2017 17th Non-Volatile Memory Technology Symposium, NVMTS 2017 - Conference Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 17th Non-Volatile Memory Technology Symposium, NVMTS 2017
Y2 - 30 August 2017 through 1 September 2017
ER -