TY - GEN
T1 - An Open-Source Constraints-Driven General Partitioning Multi-Tool for VLSI Physical Design
AU - Bustany, Ismail
AU - Gasparyan, Grigor
AU - Kahng, Andrew B.
AU - Koutis, Ioannis
AU - Pramanik, Bodhisatta
AU - Wang, Zhiang
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - With the increasing complexity of IC products, large-scale designs must be efficiently partitioned into multiple blocks, tiles, or devices for concurrent backend place-and-route (P&R) implementation. State-of-the-art partitioners focus on balanced min-cut without considering constraints such as timing or heterogeneity of resource types. They are thus increasingly unsuitable for current physical design requirements. We introduce TritonPart, the first open-source, constraints-driven partitioning tool for VLSI physical design. TritonPart employs efficient algorithms to handle constraints, including multi-dimensional balance, embedding, and timing constraints. Our experimental work affirms its benefits. For standard min-cut partitioning, TritonPart outperforms hMETIS [17], with improvements of up to 20% on some benchmarks. For embedding-aware partitioning, TritonPart effectively leverages the embeddings generated by SpecPart [4] and improves upon it by 2%. For timing-aware partitioning, TritonPart significantly reduces the number of cuts on timing-critical paths and prevents timing-noncritical paths from becoming critical (21X, 119X reduction relative to hMETIS and KaHyPar [31], respectively).
AB - With the increasing complexity of IC products, large-scale designs must be efficiently partitioned into multiple blocks, tiles, or devices for concurrent backend place-and-route (P&R) implementation. State-of-the-art partitioners focus on balanced min-cut without considering constraints such as timing or heterogeneity of resource types. They are thus increasingly unsuitable for current physical design requirements. We introduce TritonPart, the first open-source, constraints-driven partitioning tool for VLSI physical design. TritonPart employs efficient algorithms to handle constraints, including multi-dimensional balance, embedding, and timing constraints. Our experimental work affirms its benefits. For standard min-cut partitioning, TritonPart outperforms hMETIS [17], with improvements of up to 20% on some benchmarks. For embedding-aware partitioning, TritonPart effectively leverages the embeddings generated by SpecPart [4] and improves upon it by 2%. For timing-aware partitioning, TritonPart significantly reduces the number of cuts on timing-critical paths and prevents timing-noncritical paths from becoming critical (21X, 119X reduction relative to hMETIS and KaHyPar [31], respectively).
KW - VLSI constraints
KW - embedding
KW - hypergraph partitioning
KW - multi-dimensional weights
KW - timing
UR - http://www.scopus.com/inward/record.url?scp=85181405572&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85181405572&partnerID=8YFLogxK
U2 - 10.1109/ICCAD57390.2023.10323975
DO - 10.1109/ICCAD57390.2023.10323975
M3 - Conference contribution
AN - SCOPUS:85181405572
T3 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
BT - 2023 42nd IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2023 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 42nd IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2023
Y2 - 28 October 2023 through 2 November 2023
ER -