TY - GEN
T1 - An ultra-compact and low power neuron based on SOI platform
AU - Ostwal, V.
AU - Meshram, R.
AU - Rajendran, B.
AU - Ganguly, U.
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/6/3
Y1 - 2015/6/3
N2 - Analog and digital circuit designs have been proposed to mimic the biological neuron in CMOS compatible learning circuits for 'brain' like computing. However, the adaptation of such conventional circuit based strategies requires many devices, large areas and hence power consumption. We propose a neuronal device based on the well-investigated impact-ionization based NPN selector on an SOI platform. The neuronal device has a small footprint (225∗F2) and low active power (11.5nW/spike) and provides ∼10,000x speed-up over biological timescales. In comparison to analog neuron, ultra-high density (>60x improvement) and low power operation (>5x improvement) are demonstrated.
AB - Analog and digital circuit designs have been proposed to mimic the biological neuron in CMOS compatible learning circuits for 'brain' like computing. However, the adaptation of such conventional circuit based strategies requires many devices, large areas and hence power consumption. We propose a neuronal device based on the well-investigated impact-ionization based NPN selector on an SOI platform. The neuronal device has a small footprint (225∗F2) and low active power (11.5nW/spike) and provides ∼10,000x speed-up over biological timescales. In comparison to analog neuron, ultra-high density (>60x improvement) and low power operation (>5x improvement) are demonstrated.
UR - http://www.scopus.com/inward/record.url?scp=84940737995&partnerID=8YFLogxK
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U2 - 10.1109/VLSI-TSA.2015.7117569
DO - 10.1109/VLSI-TSA.2015.7117569
M3 - Conference contribution
AN - SCOPUS:84940737995
T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings
BT - 2015 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2015 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2015
Y2 - 27 April 2015 through 29 April 2015
ER -