Abstract
Quantum-dot cellular automata represents a promising technology at Nano-scale for possible substitution of silicon based transistors. Considering its prominent features like high speed, low power consumption and high operating frequency, many researches have been carried out to propose diverse digital circuits exploiting this technology. In this paper, an ultra-high speed and well-optimized QCA one-bit full adder cell is presented. This design incorporates a new triple fan-out three-input majority gate and two 3-dimentional diagonally inverters to facilitate the signal transmission through the layers. In order to examine our design in a larger array of QCA circuits, different sizes of ripple carry adders (RCAs) up to 16-bit are designed. We have used QCADesigner as a popular simulation tool for evaluation of the circuit's functioning. With respect to the counterparts, our proposed n-bit adders show lower complexity and higher speed by 27% to 34% reduction in cell count in addition to 0.5 clock cycle improvement in comparison to the best previous results.
Original language | English (US) |
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Pages (from-to) | 173-180 |
Number of pages | 8 |
Journal | Journal of Low Power Electronics |
Volume | 11 |
Issue number | 2 |
DOIs | |
State | Published - Jun 1 2015 |
Externally published | Yes |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
Keywords
- Full adder design
- Nanoelectronics
- Quantum-Dot cellular automata
- Ripple carry adder