Analysis of wafer sojourn time in dual-arm cluster tools with residency time constraint and activity time variation

When scheduling cluster tools under wafer residency time constraints, wafer sojourn time in a processing module should be carefully controlled such that it is in a permissive range. Activity time variation often results in wafer sojourn time fluctuation and makes an originally feasible schedule infeasible. Thus, it is very important to know how the wafer sojourn time changes when activity time varies. With bounded activity time variation considered, this paper conducts a detailed analysis of wafer sojourn time variation in dual-arm cluster tools. To do so, a Petri net (PN) model and a real-time control policy are presented. Based on the PN model, real-time operational architecture, and real-time control policy, this paper analyzes the effect of activity time variation on wafer sojourn time delay at a process module and presents its upper bounds. The upper bounds are given in an analytical form and can be easily evaluated. With the wafer sojourn time analysis, it is possible to develop an effective method for schedulability analysis and optimal steady-state scheduling. An example is used to show the applications of the proposed approach.