TY - JOUR
T1 - APRIS
T2 - Approximate Processing ReRAM In-Sensor Architecture Enabling Artificial-Intelligence-Powered Edge
AU - Tabrizchi, Sepehr
AU - Gaire, Rebati
AU - Morsali, Mehrdad
AU - Liehr, Maximilian
AU - Cady, Nathaniel
AU - Angizi, Shaahin
AU - Roohi, Arman
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2024
Y1 - 2024
N2 - Artificial-intelligence-powered edge devices are inspiring interest in always-on, intelligent, and self-powered visual perception systems. Due to the high energy cost of converting raw data and the limited computing and energy resources available, designing energy-efficient and low bandwidth CMOS vision sensors is vital as these emerging systems require continuous sensing and instant processing. This paper proposes a low-power integrated sensing and computing engine, namely APRIS, including a novel software/hardware co-design technique. This method provides a highly parallel analog multiplication and accumulation-in-pixel scheme, which realizes low-precision quantized weight neural networks to mitigate the overhead of analog-to-digital converters and analog buffers. Moreover, in order to reduce the size and power consumption, we propose the implementation of an approximate ADC in the readout circuit. Our system utilizes eight memory banks to increase computation parallelism, which has a dramatic effect on its speed and efficiency. Moreover, the proposed structure supports a zero-skipping scheme to reduce power consumption further. Our circuit-to-application co-simulation results demonstrate a comparable accuracy for our platform to the full-precision baseline on various object classification tasks while reaching an efficiency of ∼3.48 TOp/s/W.
AB - Artificial-intelligence-powered edge devices are inspiring interest in always-on, intelligent, and self-powered visual perception systems. Due to the high energy cost of converting raw data and the limited computing and energy resources available, designing energy-efficient and low bandwidth CMOS vision sensors is vital as these emerging systems require continuous sensing and instant processing. This paper proposes a low-power integrated sensing and computing engine, namely APRIS, including a novel software/hardware co-design technique. This method provides a highly parallel analog multiplication and accumulation-in-pixel scheme, which realizes low-precision quantized weight neural networks to mitigate the overhead of analog-to-digital converters and analog buffers. Moreover, in order to reduce the size and power consumption, we propose the implementation of an approximate ADC in the readout circuit. Our system utilizes eight memory banks to increase computation parallelism, which has a dramatic effect on its speed and efficiency. Moreover, the proposed structure supports a zero-skipping scheme to reduce power consumption further. Our circuit-to-application co-simulation results demonstrate a comparable accuracy for our platform to the full-precision baseline on various object classification tasks while reaching an efficiency of ∼3.48 TOp/s/W.
KW - Approximate computing
KW - multilayer perception
KW - processing in-sensor
KW - ReRAM
UR - http://www.scopus.com/inward/record.url?scp=85207437134&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85207437134&partnerID=8YFLogxK
U2 - 10.1109/TETC.2024.3480700
DO - 10.1109/TETC.2024.3480700
M3 - Article
AN - SCOPUS:85207437134
SN - 2168-6750
JO - IEEE Transactions on Emerging Topics in Computing
JF - IEEE Transactions on Emerging Topics in Computing
ER -