CIXOB-κ: Combined input-crosspoint-output buffered packet switch

We propose a novel architecture, a Combined Input-Crosspoint-Output Buffered (CIXOB-κ, where κ is the size of the crosspoint buffer) Switch. CIXOB-κ architecture provides 100% throughput under uniform and unbalanced traffic. It also provides timing relaxation and scalability. CIXOB-κ is based on a switch with Combined Input-Crosspoint Buffering (CIXB-κ) and round-robin arbitration. CIXB-κ has a better performance than a non-buffered crossbar that uses iSLIP arbitration scheme. CIXOB-κ uses a small speedup to provide 100% throughput under unbalanced traffic. We analyze the effect of the crosspoint buffer size and the switch size under uniform and unbalanced traffic for CIXB-κ. We also describe solutions for relaxing the crosspoint memory amount and scalability for a CIXOB-κ switch with a large number of ports.