Class of scalable architectures for high-performance, cost-effective parallel computing

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Abstract

The family of reconfigurable generalized hypercube (RGH) architectures is proposed for the construction of scalable parallel computers. The objective is to reduce the high VLSI complexity of generalized hypercubes while maintaining to high extent their outstanding performance. Generalized hypercubes are versatile topologies of very high cost that optimally emulate binary hypercubes and k-ary n-cubes. RGH's, which are lower-cost reconfigurable systems, emulate efficiently generalized hypercubes for application algorithms that use regular communication patterns. RGH's generally perform better than binary hypercubes and k-ary n-cubes with the same number of nodes. To illustrate the viability of RGH's, extensive cost analysis and comparisons with relevant systems are carried out. The hardware cost of RGH's is shown to be even lower than that of fat trees. Therefore, scalable RGH's are viable candidates for the construction of versatile parallel computers.

Original languageEnglish (US)
Pages (from-to)162-169
Number of pages8
JournalIEEE Symposium on Parallel and Distributed Processing - Proceedings
StatePublished - 1994
EventProceeedings of the 6th IEEE Symposium on Parallel and Distributed Processing - Dallas, TX, USA
Duration: Oct 26 1994Oct 29 1994

All Science Journal Classification (ASJC) codes

  • General Engineering

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