TY - GEN
T1 - Cost-efficient QCA reversible combinational circuits based on a new reversible gate
AU - Chabi, Amir Mokhtar
AU - Roohi, Arman
AU - Demara, Ronald F.
AU - Angizi, Shaahin
AU - Navi, Keivan
AU - Khademolhosseini, Hossein
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2016/1/8
Y1 - 2016/1/8
N2 - Nanotechnologies, notably Quantum-dot Cellular Automata (QCA), provide an attractive perspective for future computing technologies. In this paper, Quantum-dot Cellular Automata (QCA) is investigated as an implementation method for reversible logic. A novel XOR gate and also a new approach to implement 2:1 multiplexer are presented. Moreover, an efficient and potent universal reversible gate based on the proposed XOR gate is designed. The proposed reversible gate has a superb performance in implementing the QCA standard benchmark combinational functions in terms of area, complexity, power consumption and cost function in comparison to the other reversible gates. The gate achieves the lowest overall cost among the most cost-efficient designs presented so far, with a reduction of 24%.
AB - Nanotechnologies, notably Quantum-dot Cellular Automata (QCA), provide an attractive perspective for future computing technologies. In this paper, Quantum-dot Cellular Automata (QCA) is investigated as an implementation method for reversible logic. A novel XOR gate and also a new approach to implement 2:1 multiplexer are presented. Moreover, an efficient and potent universal reversible gate based on the proposed XOR gate is designed. The proposed reversible gate has a superb performance in implementing the QCA standard benchmark combinational functions in terms of area, complexity, power consumption and cost function in comparison to the other reversible gates. The gate achieves the lowest overall cost among the most cost-efficient designs presented so far, with a reduction of 24%.
KW - 2:1 multiplexer
KW - Combinational circuits
KW - Nanoelectronic
KW - Quantum cellular automata
KW - Reversible logic
KW - XOR gate
UR - http://www.scopus.com/inward/record.url?scp=84966656240&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84966656240&partnerID=8YFLogxK
U2 - 10.1109/CADS.2015.7377779
DO - 10.1109/CADS.2015.7377779
M3 - Conference contribution
AN - SCOPUS:84966656240
T3 - 18th CSI International Symposium on Computer Architecture and Digital Systems, CADS 2015
BT - 18th CSI International Symposium on Computer Architecture and Digital Systems, CADS 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 18th CSI International Symposium on Computer Architecture and Digital Systems, CADS 2015
Y2 - 7 October 2015 through 8 October 2015
ER -