Data broadcasting and reduction, prefix computation, and sorting on reduced hypercube parallel computers

Sotirios G. Ziavras, Arup Mukherjee

Research output: Contribution to journalArticlepeer-review

8 Scopus citations

Abstract

The popular hypercube interconnection network has high wiring(VLSI) complexity. The reduced hypercube (RH) is obtained by a uniform reduction in the number of channels for each hypercube node in order to reduce the VLSI complexity. It is known that the RH achieves performance comparable to that of the hypercube, at much lower hardware cost, through hypercube emulation. The reduced complexity of the RH permits the construction of powerful, massively parallel computers. This paper proposes algorithms for data broadcasting and reduction, prefix computation, and sorting on the RH. These operations are fundamental to many parallel algorithms. A worst case analysis of each algorithm is given and compared with that of equivalent algorithms for the hypercube. It is shown that the proposed algorithms for the RH yield performance comparable to that of the hypercube.

Original languageEnglish (US)
Pages (from-to)595-606
Number of pages12
JournalParallel Computing
Volume22
Issue number4
DOIs
StatePublished - Jun 1996

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computer Networks and Communications
  • Computer Graphics and Computer-Aided Design
  • Artificial Intelligence

Keywords

  • Data broadcasting
  • Data reduction
  • Hypercube architecture
  • Prefix computation
  • Reduced hypercube interconnection network
  • Sorting
  • VLSI complexity

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