Testing for intermittent faults in digital circuits has been given significant attention in the past few years. However, very little theoretical work was done regarding their detection in sequential circuits. This paper shows that the testing properties of intermittent faults insequential circuits can be studied by means of a probabilistic automaton. The evaluation and derivation of optimal intermittent fault detection experiments in sequential circuits is done by creating a product state table from the faulty and fault-free versions of the circuit under test. Both deterministic and random test procedures are discussed. The underlying optimality criterion maximizes the probability of fault detection.
All Science Journal Classification (ASJC) codes
- Computational Theory and Mathematics
- Hardware and Architecture
- Theoretical Computer Science
- Electrical and Electronic Engineering