Skip to main navigation
Skip to search
Skip to main content
New Jersey Institute of Technology Home
Help & FAQ
Home
Profiles
Research units
Facilities
Federal Grants
Research output
Press/Media
Search by expertise, name or affiliation
Effect of BIST pretest on IC defect level
Yoshiyuki Nakamura
,
Jacob Savir
, Hideo Fujiwara
Electrical and Computer Engineering
Research output
:
Contribution to journal
›
Article
›
peer-review
Overview
Fingerprint
Fingerprint
Dive into the research topics of 'Effect of BIST pretest on IC defect level'. Together they form a unique fingerprint.
Sort by
Weight
Alphabetically
Keyphrases
Circuitry
100%
Defect Levels
100%
Fault-free
50%
Functional Test
50%
Product Quality Improvement
50%