Effect of sputtered TiW deposition conditions on barrier properties for submicron metallization

G. E. Georgiou, M. Baker, S. A. Eshraghi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We report the results of an orthogonal array study of the step coverage of magnetron sputtered TiW. We concentrate on the effect of target power (l-2.5kW), Ar pressure (4-2lmT), and substrate temperature (100-450°C) on coverage into near vertical wall windows (85° wall angle) with aspect ratio -1.5 (h/w=l.3/0.85) reactive ion etched in a deposited oxide. Scanning electron microscopy (SEM) indicates that coverage defined as the ratio of TiW -1000A thick on top of oxide to that in the bottom of the windows, varies between -25-35%. Coverage improves with moderate power ~2kW and temperature ~300°C. Ar pressure has a somewhat smaller effect on coverage than either power or temperature. TiW resistivity and stress magnitude also decrease to 0.65-0.7μΩ-cm and low 109 dynes/cm2 respectively, for the sputtering conditions used to maximize step coverage. Reverse bias diode leakage (-3000Å deep n+/p with -1000Å TiSi2 and window contacts) does not degrade for Al/TiW or Al/CVD W/TiW metallization of the window contacts are annealed at 450oC,30min., the highest anneal cycle used in this study. Low leakage was measured for a nominal 1000Å thick TiW deposited with the conditions giving the best and worst window coverage, indicating that -300Å is an acceptable barrier at ≤450°C.

Original languageEnglish (US)
Title of host publication1991 Proceedings 8th International IEEE VLSI Multilevel Interconnection Conference, VMIC 1991
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages420-422
Number of pages3
ISBN (Electronic)087942673X, 9780879426736
DOIs
StatePublished - Jan 1 1991
Event8th International IEEE VLSI Multilevel Interconnection Conference, VMIC 1991 - Santa Clara, United States
Duration: Jun 11 1991Jun 12 1991

Publication series

Name1991 Proceedings 8th International IEEE VLSI Multilevel Interconnection Conference, VMIC 1991

Conference

Conference8th International IEEE VLSI Multilevel Interconnection Conference, VMIC 1991
Country/TerritoryUnited States
CitySanta Clara
Period6/11/916/12/91

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Hardware and Architecture

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