Efficient LU factorization on FPGA-based machines

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Configurable computing has demonstrated its ability to significantly improve performance for many computationintensive applications. With steady advances in silicon technology, Field-Programmable Gate Array (FPGA) technologies have enabled the implementation of robust System-On-a-Programmable-Chip (SOPC) computing platforms, which, in turn, have given significant boost to the field of (re)configurable computing. With innovative approaches, it is now possible to implement various specialized parallel computing machines in FPGAs. LU factorization is widely used in engineering and science to solve efficiently large systems of linear equations. We describe here our design and implementation of a parallel machine on an SOPC development board, using multiple copies of the Altera® soft configurable processor, namely Nios®; we use this design for the LU factorization of large, sparse matrices. Such matrices are ubiquitous in several application areas, including electrical power flow. Our implementation facilitates the efficient solution of linear equations at a cost much lower than that of supercomputers and networks of workstations. The intricacies of our FPGA-based design are presented along with tradeoff choices made for the purpose of illustration. Performance results prove the viability of our FPGA-based approach.

Original languageEnglish (US)
Title of host publicationProceedings of the Seventh IASTED International Multi-Conference - Power and Energy Systems
EditorsK.M. Smedley
Number of pages6
StatePublished - 2003
EventProceedings of the Seventh IASTED International Multi-Conference - Power and Energy Systems - Palm Springs, CA, United States
Duration: Feb 24 2003Feb 26 2003

Publication series

NameProceedings of the IASTED Multi-Conference- Power and Energy Systems


OtherProceedings of the Seventh IASTED International Multi-Conference - Power and Energy Systems
Country/TerritoryUnited States
CityPalm Springs, CA

All Science Journal Classification (ASJC) codes

  • Development
  • General Energy


  • FPGA
  • LU factorization
  • Matrix inversion
  • Parallel processing
  • SOPC


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