Efficient on-chip vector processing for multicore processors

Spiridon F. Beldianu, Sotirios G. Ziavras

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Per-core vector support in multicores is not efficient since applications rarely sustain high DLP. We present two Power Gating (PG) schemes to dynamically control Vector co-Processors (VPs) shared by cores. ASIC and FPGA modeling show that PG can reduce the energy by 33% while maintaining high performance.

Original languageEnglish (US)
Title of host publication2013 International Symposium on System-on-Chip, SoC 2013 - Proceedings
PublisherIEEE Computer Society
ISBN (Print)9781479911899
DOIs
StatePublished - 2013
Event2013 15th International Symposium on System-on-Chip, SoC 2013 - Tampere, Finland
Duration: Oct 23 2013Oct 24 2013

Publication series

Name2013 International Symposium on System-on-Chip, SoC 2013 - Proceedings

Other

Other2013 15th International Symposium on System-on-Chip, SoC 2013
CountryFinland
CityTampere
Period10/23/1310/24/13

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Keywords

  • Multicores
  • Vector processing

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