Efficient quantum dot cellular automata memory architectures based on the new wiring approach

Quantum dot cellular automata (QCA) implies a pioneer technology at Nano scale computer designs. Employing this technology is one of the solutions to decrease the size of circuits and reducing power dissipation. In this paper, an area optimized level sensitive D Flip Flop as well as an overall high performance edge triggered D Flip Flop and T Flip Flop and finally an ultra-high speed, area efficient with minimum number of cells RAM cell are presented. Random access memory (RAM) is a principle component of the QCA digital circuits, which is made based on one of the four kind of flip flops. It is to be notified that a novel approach in QCA wiring is also presented. The QCA structures, which utilize this wiring approach, are more efficient in the number of cells, the area occupation, the propagation delay and also there are no coplanar cross over wiring which makes the designs feasible. The proper logical functionality of the proposed designs is proven using the QCADesigner.