@inproceedings{7eadc44b89a1427a925f2b6e36006f74,
title = "Electrical characterization of dry and wet processed interface layer in Ge/high-K devices",
abstract = "Even through Ge/high-k interface has been extensively studied, the high leakage current associated with these gate stacks and interface defects continue to introduce frequency dispersion and hysteresis in capacitance-voltage (CV) and conductance-voltage (GV) characteristics. These dispersions severely limit the understanding the interface and accurate estimation of interface state density, Dit and equivalent oxide thickness (EOT). In this work, the dry and wet processed interface layers for three different p type Ge/High-K samples on 300 mm wafers were studied at different low temperatures by CV and GV measurement. Since low temperature measurements are more reliable several parameters like EOT, flatband voltage, bulk doping, surface potential as a function of gate voltage are reported and interface quality is being discussed.",
author = "Y. Ding and D. Misra and Bhuyian, {M. N.} and K. Tapily and Clark, {R. D.} and S. Consiglio and Wajda, {C. S.} and Leusink, {G. J.}",
note = "Publisher Copyright: {\textcopyright} The Electrochemical Society.; Symposium on Semiconductors, Dielectrics, and Metals for Nanoelectronics 13 - 228th ECS Meeting ; Conference date: 11-10-2015 Through 15-10-2015",
year = "2015",
doi = "10.1149/06905.0313ecst",
language = "English (US)",
series = "ECS Transactions",
publisher = "Electrochemical Society Inc.",
number = "5",
pages = "313--322",
editor = "S. Kar and K. Kita and D. Landheer and D. Misra",
booktitle = "Semiconductors, Dielectrics, and Metals for Nanoelectronics 13",
edition = "5",
}