Exploring branch target buffer access filtering for low-energy and high-performance microarchitectures

Keyphrases

• Branch Predictor 16%
• Branch Target Buffer 100%
• Clock Frequency 16%
• Deep Submicron Technology 16%
• Dynamic Power 16%
• Effective Design 16%
• Energy Consumption 33%
• Energy Consumption Reduction 16%
• Energy Performance 100%
• Energy Reduction 16%
• Filter Design 50%
• Filtering Scheme 33%
• High Performance 100%
• High-speed Design 16%
• Instruction-level Parallelism 16%
• Leakage Behavior 16%
• Leakage Control 16%
• Low Energy 100%
• Microarchitecture 100%
• Performance Loss 16%
• Performance Overhead 16%
• Performance Scalability 16%
• Simultaneous multithreading 50%
• Superscalar Processor 16%
• Thread-level Parallelism Exploitation 16%

Computer Science

• Branch Predictor 16%
• Branch Target Buffer 100%
• Clock Frequency 16%
• Energy Consumption 50%
• Energy Performance 33%
• Experimental Result 16%
• Instruction-Level Parallelism 16%
• Microarchitecture 100%
• Performance Loss 16%
• Simultaneous Multi-Threading 50%
• Superscalar 33%
• thread-level parallelism 16%

Engineering

• Clock Frequency 14%
• Energy Engineering 57%
• Energy Performance 14%
• Experimental Result 14%
• Filtration 100%
• Microprocessor Chips 14%
• Parallelism 28%
• Performance Loss 14%