FPGA and ASIC square root designs for high performance and power efficiency

Shashank Suresh, Spiridon F. Beldianu, Sotirios G. Ziavras

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Scopus citations

Abstract

Floating-point square root is a fundamental operation in signal processing and various HPC applications. Since this is an expensive operation in resource and energy consumption, its efficient implementation should be of priority in future multicores that will face dark silicon issues. This paper presents a low-cost, low-power consumption design to calculate the square root using the IEEE754 single-precision floating-point format. Two versions of the design are investigated with and without clock gating (CG), respectively. Evaluation involves FPGA and ASIC technologies at 40 and 65 nm. Substantial performance growth and reduced power consumption are gained as compared to a popular iterative solution. The ASIC design demonstrates much lower power consumption, which at 40 nm is lower than that at 65 nm by about a threefold. At 40 nm, CG for the ASIC realization is justified primarily for low activity rates.

Original languageEnglish (US)
Title of host publicationASAP 2013 - Proceedings of the 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors
Pages269-272
Number of pages4
DOIs
StatePublished - 2013
Event2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2013 - Washington, DC, United States
Duration: Jun 5 2013Jun 7 2013

Publication series

NameProceedings of the International Conference on Application-Specific Systems, Architectures and Processors
ISSN (Print)1063-6862

Other

Other2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2013
Country/TerritoryUnited States
CityWashington, DC
Period6/5/136/7/13

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Computer Networks and Communications

Keywords

  • ASIC
  • FPGA
  • energy consumption
  • floating-point square root
  • multicore processors

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