From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory Accelerator Design Automation

Deepak Vungarala; Md Hasibul Amin; Arman Roohi; Arnob Ghosh; Ramtin Zand; Shaahin Angizi

doi:10.1145/3716368.3735276

From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory Accelerator Design Automation

Deepak Vungarala
, Md Hasibul Amin
, Arman Roohi
, Arnob Ghosh
, Ramtin Zand
, Shaahin Angizi

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Analog In-Memory Computing (IMC) presents a promising approach to energy-efficient deep learning accelerators; however, the fragmented analog design workflow necessitates extensive expertise and manual effort across various abstraction layers. In this paper, we envision ALPHA, an automated, fine-tune-free pipeline that vertically integrates low-level SPICE-code synthesis with high-level IMC architecture exploration. ALPHA is built on top of our previous works, i.e., SPICEPilot [23], a prompt-driven engine that generates and validates analog SPICE/PySpice modules (DACs, op-amps, current mirrors) without model fine-tuning; and LIMCA [24], a no-human-in-loop framework for power-area-accuracy constrained design space exploration of IMC crossbars. Together, they translate user intent into functionally verified circuits and end-to-end IMC systems.

Original language	English (US)
Title of host publication	GLSVLSI 2025 - Proceedings of the Great Lakes Symposium on VLSI 2025
Publisher	Association for Computing Machinery
Pages	811-816
Number of pages	6
ISBN (Electronic)	9798400714962
DOIs	https://doi.org/10.1145/3716368.3735276
State	Published - Jun 29 2025
Event	35th Edition of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025 - New Orleans, United States Duration: Jun 30 2025 → Jul 2 2025

Publication series

Name	Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Conference

Conference	35th Edition of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025
Country/Territory	United States
City	New Orleans
Period	6/30/25 → 7/2/25

All Science Journal Classification (ASJC) codes

General Engineering

Access to Document

10.1145/3716368.3735276

Cite this

Vungarala, D., Amin, M. H., Roohi, A., Ghosh, A., Zand, R., & Angizi, S. (2025). From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory Accelerator Design Automation. In GLSVLSI 2025 - Proceedings of the Great Lakes Symposium on VLSI 2025 (pp. 811-816). (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI). Association for Computing Machinery. https://doi.org/10.1145/3716368.3735276

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title = "From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory Accelerator Design Automation",

abstract = "Analog In-Memory Computing (IMC) presents a promising approach to energy-efficient deep learning accelerators; however, the fragmented analog design workflow necessitates extensive expertise and manual effort across various abstraction layers. In this paper, we envision ALPHA, an automated, fine-tune-free pipeline that vertically integrates low-level SPICE-code synthesis with high-level IMC architecture exploration. ALPHA is built on top of our previous works, i.e., SPICEPilot [23], a prompt-driven engine that generates and validates analog SPICE/PySpice modules (DACs, op-amps, current mirrors) without model fine-tuning; and LIMCA [24], a no-human-in-loop framework for power-area-accuracy constrained design space exploration of IMC crossbars. Together, they translate user intent into functionally verified circuits and end-to-end IMC systems.",

author = "Deepak Vungarala and Amin, \{Md Hasibul\} and Arman Roohi and Arnob Ghosh and Ramtin Zand and Shaahin Angizi",

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Vungarala, D, Amin, MH, Roohi, A, Ghosh, A, Zand, R & Angizi, S 2025, From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory Accelerator Design Automation. in GLSVLSI 2025 - Proceedings of the Great Lakes Symposium on VLSI 2025. Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, Association for Computing Machinery, pp. 811-816, 35th Edition of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, United States, 6/30/25. https://doi.org/10.1145/3716368.3735276

From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory Accelerator Design Automation. / Vungarala, Deepak; Amin, Md Hasibul; Roohi, Arman et al.
GLSVLSI 2025 - Proceedings of the Great Lakes Symposium on VLSI 2025. Association for Computing Machinery, 2025. p. 811-816 (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - Analog In-Memory Computing (IMC) presents a promising approach to energy-efficient deep learning accelerators; however, the fragmented analog design workflow necessitates extensive expertise and manual effort across various abstraction layers. In this paper, we envision ALPHA, an automated, fine-tune-free pipeline that vertically integrates low-level SPICE-code synthesis with high-level IMC architecture exploration. ALPHA is built on top of our previous works, i.e., SPICEPilot [23], a prompt-driven engine that generates and validates analog SPICE/PySpice modules (DACs, op-amps, current mirrors) without model fine-tuning; and LIMCA [24], a no-human-in-loop framework for power-area-accuracy constrained design space exploration of IMC crossbars. Together, they translate user intent into functionally verified circuits and end-to-end IMC systems.

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Vungarala D, Amin MH, Roohi A, Ghosh A, Zand R, Angizi S. From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory Accelerator Design Automation. In GLSVLSI 2025 - Proceedings of the Great Lakes Symposium on VLSI 2025. Association for Computing Machinery. 2025. p. 811-816. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI). doi: 10.1145/3716368.3735276

From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory Accelerator Design Automation

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