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Generator choices for delay test
Jacob Savir
Research output
:
Contribution to journal
›
Conference article
›
peer-review
5
Scopus citations
Overview
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Keyphrases
Built-in-self-test (BiST)
66%
Cost Performance
33%
Delay Faults
33%
Delay Test
100%
On chip
33%
Performance Flexibility
33%
Scan Design
33%
Test Vector
66%
Time Constraints
33%
Vector Signal Generator
33%
Engineering
Built-in Self Test
100%
Cost Performance
50%
Tasks
50%