@inproceedings{690cbfb8c6ff4c829af4258ddc04deee,
title = "GraphS: A Graph Processing Accelerator Leveraging SOT-MRAM",
abstract = "In this work, we present GraphS architecture, which transforms current Spin Orbit Torque Magnetic Random Access Memory (SOT-MRAM) to massively parallel computational units capable of accelerating graph processing applications. GraphS can be leveraged to greatly reduce energy consumption dealing with underlying adjacency matrix computations, eliminating unnecessary off-chip accesses and providing ultra-high internal bandwidth. The device-to-architecture co-simulation for three social network data-sets indicate roughly 3.6× higher energy-efficiency and 5.3× speed-up over recent ReRAM crossbar. It achieves ∼4× higher energy-efficiency and 5.1× speed-up over recent processing-in-DRAM acceleration methods.",
author = "Shaahin Angizi and Jiao Sun and Wei Zhang and Deliang Fan",
note = "Publisher Copyright: {\textcopyright} 2019 EDAA.; 22nd Design, Automation and Test in Europe Conference and Exhibition, DATE 2019 ; Conference date: 25-03-2019 Through 29-03-2019",
year = "2019",
month = may,
day = "14",
doi = "10.23919/DATE.2019.8715270",
language = "English (US)",
series = "Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "378--383",
booktitle = "Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019",
address = "United States",
}