H-SIMD machine: Configurable parallel computing for matrix multiplication

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of data-intensive applications [1, 2], However, mapping algorithms onto multimillion-gate FPGAs is time consuming and remains a challenge in configurable system design. The communication overhead between the host workstation and the FPGAs is also significant. To address these problems, we propose in this paper the FPGA-based Hierarchical-SIMD (H-SIMD) machine with its codesign of the Hierarchical Instruction Set Architecture (HISA). At each level, HISA instructions are classified into communication instructions or computation instructions. The former are executed by the local controller while the latter are issued to the lower level for execution. Additionally, by using a memory switching scheme and the high-level HISA set to partition the application into coarse-grain tasks, the host-FPGA communication overhead can be hidden. We enlist matrix multiplication (MM) to test the effectiveness of H-SIMD. The test results show sustained high performance.

Original languageEnglish (US)
Title of host publicationProceedings - 2005 IEEE International Conference on Computer Design
Subtitle of host publicationVLSI in Computers and Processors, ICCD 2005
Pages671-676
Number of pages6
DOIs
StatePublished - 2005
Event2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005 - San Jose, CA, United States
Duration: Oct 2 2005Oct 5 2005

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Volume2005
ISSN (Print)1063-6404

Other

Other2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005
CountryUnited States
CitySan Jose, CA
Period10/2/0510/5/05

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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