The interface defect response at the high k and high-mobility substrate interface has been discussed in this short review. The impact of interface passivation techniques to optimize device performance was outlined. From the electrical performance, the interface characteristics seem to depend on the deposition process, combination of deposition parameters, the substrate surface orientation, pre-deposition surface treatments, and subsequent annealing temperatures. Some recent developments of the high k/Ge interface and high k/III-V interface and their characterization were discussed.
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