HugeGPT: Storing Guest Page Tables on Host Huge Pages to Accelerate Address Translation

Weiwei Jia, Jiyuan Zhang, Jianchen Shan, Yiming Du, Xiaoning Ding, Tianyin Xu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Expensive page table walks triggered by frequent TLB misses have incurred major performance bottlenecks for data-intensive workloads that are dominated by memory accesses with weak locality. Since it is hard to reduce TLB misses for such workloads, reducing page table walk overhead (i.e., the overhead of each TLB miss) is an increasingly important direction for improving application performance. The direction is more compelling for workloads running in virtual machines (VMs). In virtualized environments, each TLB miss triggers a two-dimensional page table walk, which has a significantly higher overhead than that on native systems. This paper presents HugeGPT, a software approach to reducing two-dimensional page table walk overhead in virtualized environments. HugeGPT ensures that page tables used in guest systems are physically held in the huge pages formed in the host. This brings two-fold benefits: 1) the number of steps walking down the host page table is reduced; 2) the misses of page walk caches incurred by accessing the leaf nodes on host page tables can be eliminated. Extensive evaluation based on the prototype implementation and diverse real-world applications shows that HugeGPT can efficiently reduce address translation overhead and improve application performance in virtualized clouds.

Original languageEnglish (US)
Title of host publicationProceedings - 2023 32nd International Conference on Parallel Architecture and Compilation Techniques, PACT 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages62-73
Number of pages12
ISBN (Electronic)9798350342543
DOIs
StatePublished - 2023
Event32nd International Conference on Parallel Architecture and Compilation Techniques, PACT 2023 - Vienna, Austria
Duration: Oct 21 2023Oct 25 2023

Publication series

NameParallel Architectures and Compilation Techniques - Conference Proceedings, PACT
ISSN (Print)1089-795X

Conference

Conference32nd International Conference on Parallel Architecture and Compilation Techniques, PACT 2023
Country/TerritoryAustria
CityVienna
Period10/21/2310/25/23

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

Keywords

  • Memory Management
  • Operating Systems
  • Page Tables
  • TLB
  • Virtualization

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