Implementation of a parallel-search trie-based scheme for fast IP lookup

Rojas Cessa Roberto, Laksmi Ramesh, Ziqian Dong, Brian D'Alessandro

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The Internet Protocol (IP) address lookup is required to be resolved fast to keep up with data rate increases. To cope with the increasing number of entries, solutions for IP lookup based on random access memory (RAM), which store prefixes in a trie-based structure, are of interest. In this paper, we propose a flexible and fast trie-based IP lookup algorithm where parallel searching is performed. This algorithm performs lookup in a maximum of two memory-access times while using a feasible amount of memory.

Original languageEnglish (US)
Title of host publicationProceedings of the IASTED International Conference on Communication Systems, Networks, and Applications, CSNA 2007
Pages54-56
Number of pages3
StatePublished - Dec 1 2007
EventInternational Association of Science and Technology for Development, IASTED - Beijing, China
Duration: Oct 8 2007Oct 10 2007

Publication series

NameProceedings of the IASTED International Conference on Communication Systems, Networks, and Applications, CSNA 2007

Other

OtherInternational Association of Science and Technology for Development, IASTED
CountryChina
CityBeijing
Period10/8/0710/10/07

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Communication

Keywords

  • Hashing
  • Parallel search
  • Prefix expansion
  • RAM based.
  • Trie search

Fingerprint Dive into the research topics of 'Implementation of a parallel-search trie-based scheme for fast IP lookup'. Together they form a unique fingerprint.

Cite this