Implementation of generalized DFT on Field Programmable Gate Array

Wes P. Weydig; Mustafa U. Torun; Ali Akansu

doi:10.1109/ICASSP.2012.6288227

Implementation of generalized DFT on Field Programmable Gate Array

Wes P. Weydig, Mustafa U. Torun, Ali Akansu

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

We introduce the implementation of Generalized Discrete Fourier Transform (GDFT) with nonlinear phase on a Field Programmable Gate Array (FPGA.) After briefly revisiting the GDFT framework, we apply the framework to a channel equalization problem in an Orthogonal Frequency Division Multiplexing (OFDM) communication system. The block diagram of the system is introduced and detailed explanations of the implementation for each block are given along with the necessary VHDL code snippets. The resource usage and registered performance of the design is reported and alternatives to improve the design in terms of performance and resolution are provided. To the best of our knowledge, this is the first hardware implementation of GDFT reported in the literature.

Original language	English (US)
Title of host publication	2012 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2012 - Proceedings
Pages	1709-1712
Number of pages	4
DOIs	https://doi.org/10.1109/ICASSP.2012.6288227
State	Published - Oct 23 2012
Event	2012 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2012 - Kyoto, Japan Duration: Mar 25 2012 → Mar 30 2012

Other

Other	2012 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2012
Country/Territory	Japan
City	Kyoto
Period	3/25/12 → 3/30/12

All Science Journal Classification (ASJC) codes

Software
Signal Processing
Electrical and Electronic Engineering

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10.1109/ICASSP.2012.6288227

Cite this

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title = "Implementation of generalized DFT on Field Programmable Gate Array",

abstract = "We introduce the implementation of Generalized Discrete Fourier Transform (GDFT) with nonlinear phase on a Field Programmable Gate Array (FPGA.) After briefly revisiting the GDFT framework, we apply the framework to a channel equalization problem in an Orthogonal Frequency Division Multiplexing (OFDM) communication system. The block diagram of the system is introduced and detailed explanations of the implementation for each block are given along with the necessary VHDL code snippets. The resource usage and registered performance of the design is reported and alternatives to improve the design in terms of performance and resolution are provided. To the best of our knowledge, this is the first hardware implementation of GDFT reported in the literature.",

author = "Weydig, {Wes P.} and Torun, {Mustafa U.} and Ali Akansu",

year = "2012",

month = oct,

day = "23",

doi = "10.1109/ICASSP.2012.6288227",

language = "English (US)",

isbn = "9781467300469",

pages = "1709--1712",

booktitle = "2012 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2012 - Proceedings",

note = "2012 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2012 ; Conference date: 25-03-2012 Through 30-03-2012",

}

Weydig, WP, Torun, MU & Akansu, A 2012, Implementation of generalized DFT on Field Programmable Gate Array. in 2012 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2012 - Proceedings., 6288227, pp. 1709-1712, 2012 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2012, Kyoto, Japan, 3/25/12. https://doi.org/10.1109/ICASSP.2012.6288227

TY - GEN

T1 - Implementation of generalized DFT on Field Programmable Gate Array

AU - Weydig, Wes P.

AU - Torun, Mustafa U.

AU - Akansu, Ali

PY - 2012/10/23

Y1 - 2012/10/23

N2 - We introduce the implementation of Generalized Discrete Fourier Transform (GDFT) with nonlinear phase on a Field Programmable Gate Array (FPGA.) After briefly revisiting the GDFT framework, we apply the framework to a channel equalization problem in an Orthogonal Frequency Division Multiplexing (OFDM) communication system. The block diagram of the system is introduced and detailed explanations of the implementation for each block are given along with the necessary VHDL code snippets. The resource usage and registered performance of the design is reported and alternatives to improve the design in terms of performance and resolution are provided. To the best of our knowledge, this is the first hardware implementation of GDFT reported in the literature.

AB - We introduce the implementation of Generalized Discrete Fourier Transform (GDFT) with nonlinear phase on a Field Programmable Gate Array (FPGA.) After briefly revisiting the GDFT framework, we apply the framework to a channel equalization problem in an Orthogonal Frequency Division Multiplexing (OFDM) communication system. The block diagram of the system is introduced and detailed explanations of the implementation for each block are given along with the necessary VHDL code snippets. The resource usage and registered performance of the design is reported and alternatives to improve the design in terms of performance and resolution are provided. To the best of our knowledge, this is the first hardware implementation of GDFT reported in the literature.

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U2 - 10.1109/ICASSP.2012.6288227

DO - 10.1109/ICASSP.2012.6288227

M3 - Conference contribution

AN - SCOPUS:84867625956

SN - 9781467300469

SP - 1709

EP - 1712

BT - 2012 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2012 - Proceedings

T2 - 2012 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2012

Y2 - 25 March 2012 through 30 March 2012

ER -

Implementation of generalized DFT on Field Programmable Gate Array

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