## Abstract

We give improved approximations for two classical embedding problems: (i) minimizing the number of crossings in a drawing on the plane of a bounded degree graph; and (ii) minimizing the VLSI layout area of a graph of maximum degree four. These improved algorithms can be applied to improve a variety of VLSI layout problems. Our results are as follows. (i) We compute a drawing on the plane of a bounded degree graph in which the sum of the numbers of vertices and crossings is O(log^{3} n) times the optimal minimum sum. This is a logarithmic factor improvement relative to the best known result. (ii) We compute a VLSI layout of a graph of maximum degree four in a square grid whose area is O(log^{4} n) times the minimum layout area. This is an O(log^{2} n) improvement over the best known long-standing result.

Original language | English (US) |
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Pages (from-to) | 231-252 |

Number of pages | 22 |

Journal | SIAM Journal on Computing |

Volume | 32 |

Issue number | 1 |

DOIs | |

State | Published - Jan 1 2003 |

Externally published | Yes |

## All Science Journal Classification (ASJC) codes

- General Computer Science
- General Mathematics

## Keywords

- Approximation algorithm
- Crossing number
- Graph drawing
- VLSI layout