Improving MLC PCM write throughput by write reconstruction

Huizhang Luo, Liang Shi, Mengying Zhao, Qingfeng Zhuge, Chun Jason Xue

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

The emerging Phase Change Memory (PCM) is considered as one of the most promising candidates to replace DRAM as main memory due to its better scalability and nonvolatility. With multi-bit storage capability, Multiple-Level-Cell (MLC) PCM outperforms Single-Level-Cell (SLC) in density. However, the high write latency is a performance bottleneck for MLC PCM for two reasons. First, MLC PCM has a much longer programming time. Second, the write latencies of different transitions of cell states range widely. When cells are concurrently written in burst mode, the write latency of a burst is decided by the worst one. To improve the write throughput of MLC PCM, this paper proposes a Write Reconstruction (WR) scheme. WR reconstructs multiple burst writes targeting the same row. The worst case cells are put together in some writes. By this way, the write latency of other writes will be reduced. WR incurs low implementation overhead and shows significant efficiency. Experimental results show that WR achieves 15.1% of write latency reduction on average, with negligible power overhead (3.4%).

Original languageEnglish (US)
Title of host publication2015 IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467366885
DOIs
StatePublished - Oct 22 2015
Externally publishedYes
EventIEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2015 - Hong Kong, Hong Kong
Duration: Aug 19 2015Aug 21 2015

Publication series

Name2015 IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2015

Other

OtherIEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2015
Country/TerritoryHong Kong
CityHong Kong
Period8/19/158/21/15

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

Keywords

  • Computer architecture
  • Decoding
  • Microprocessors
  • Phase change materials
  • Programming
  • Resistance
  • Sorting

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