TY - GEN
T1 - Increasing reconfigurability with memristive interconnects
AU - Demme, John
AU - Rajendran, Bipin
AU - Nowick, Steven M.
AU - Sethumadhavan, Simha
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/12/14
Y1 - 2015/12/14
N2 - The design of on-chip interconnects is largely governed by the size and power of the devices being connected. While large components like memory controllers, video decode accelerators, and cores can afford the overhead of a large packet switching NoC router, smaller components like adders or other ALUs cannot. Instead, they are typically connected via simple wires, limiting their runtime reconfigurability. The notable exception-FPGAs-use an interconnect which allows extreme reconfigurability, but the FPGA pays for it in area, power, and latency costs. Less costly reconfigurable interconnects, therefore, could allow hardware designers to expose more reconfigurability while limiting area and power costs. This paper presents the design of a high-radix circuit switching crossbar design using memristors. This design utilizes Phase Change Memory (PCM), overcoming some of its limitations such as leakage power and low voltage operation. The very small size of memristors shrinks the area, power, and latency of crossbars by up to 16x, 4.4x, and 2.4x, respectively, leaving little interconnect overhead but wiring overhead. As a tool for designers, memristive interconnects offer significant potential to increase runtime design flexibility.
AB - The design of on-chip interconnects is largely governed by the size and power of the devices being connected. While large components like memory controllers, video decode accelerators, and cores can afford the overhead of a large packet switching NoC router, smaller components like adders or other ALUs cannot. Instead, they are typically connected via simple wires, limiting their runtime reconfigurability. The notable exception-FPGAs-use an interconnect which allows extreme reconfigurability, but the FPGA pays for it in area, power, and latency costs. Less costly reconfigurable interconnects, therefore, could allow hardware designers to expose more reconfigurability while limiting area and power costs. This paper presents the design of a high-radix circuit switching crossbar design using memristors. This design utilizes Phase Change Memory (PCM), overcoming some of its limitations such as leakage power and low voltage operation. The very small size of memristors shrinks the area, power, and latency of crossbars by up to 16x, 4.4x, and 2.4x, respectively, leaving little interconnect overhead but wiring overhead. As a tool for designers, memristive interconnects offer significant potential to increase runtime design flexibility.
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U2 - 10.1109/ICCD.2015.7357124
DO - 10.1109/ICCD.2015.7357124
M3 - Conference contribution
AN - SCOPUS:84962359292
T3 - Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015
SP - 351
EP - 358
BT - Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 33rd IEEE International Conference on Computer Design, ICCD 2015
Y2 - 18 October 2015 through 21 October 2015
ER -