Lateral superlattices fabricated with interferometric lithography for nanoscale device applications

Two-dimensional periodic arrays of inverted pyramid holes with nanometer scale have been patterned on the surface of a (100) silicon wafer and studied for possible application in nanoscale silicon based devices. The surface patterning employed a simple microelectronic processing scheme in which the standing wave intensity pattern from two interfering 458nm laser beams was used to expose holes in a photoresist layer. Subsequent dry etching through an underlying oxide mask layer, followed by a KOH etching step yielded a highly periodic, large area array of inverted pyramids. The pyramid geometry is formed during the anisotropic KOH etch, which stops at the (111) pyramid walls. Therefore, the tips of all inverted pyramids are formed by the intersection of (111) silicon crystal planes and have identical geometry. This study focuses on the use of these features as templates for the controlled crystallization of amorphous silicon layers and also as electric field concentrating "funnels" in MOS-type structures. We will discuss a proposed device in which silicon nanocrystals will be incorporated into the concentrated electric field region at the tip of each inverted pyramid. With this structure, the charging of identical addressable nanocrystals may be possible, leading to the development of practical nanoscale silicon devices.