Layout Influences Testability

Thomas H. Spencer; Jacob Savir

doi:10.1109/TC.1985.1676573

Layout Influences Testability

Thomas H. Spencer, Jacob Savir

Research output: Contribution to journal › Article › peer-review

8 Scopus citations

Abstract

This correspondence addresses actual implementation of a multiway fan-out and its effect on test generation. If a test generation ignores the fan-out implementation faults may be left undetected by the test set. Moreover, different implementations of the multiway fan-out may lead to different fault coverages. Careless implementation of the fan-out may also yield undetectable faults. Some guidelines for fan-out implementation that may enhance testability are given in this correspondence.

Original language	English (US)
Pages (from-to)	287-290
Number of pages	4
Journal	IEEE Transactions on Computers
Volume	C-34
Issue number	3
DOIs	https://doi.org/10.1109/TC.1985.1676573
State	Published - Mar 1985
Externally published	Yes

All Science Journal Classification (ASJC) codes

Software
Theoretical Computer Science
Hardware and Architecture
Computational Theory and Mathematics

Keywords

Boolean difference
fan-out
layout
masking
reconvergent fan-out

Access to Document

10.1109/TC.1985.1676573

Cite this

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KW - masking

KW - reconvergent fan-out

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Layout Influences Testability

Abstract

All Science Journal Classification (ASJC) codes

Keywords

Access to Document

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