Low-complexity parallel system for gracious, scalable performance. Case study for near PetaFLOPS computing

S. G. Ziavras, H. Grebel, A. Chronopoulos

Research output: Contribution to conferencePaperpeer-review

7 Scopus citations

Abstract

This paper presents a ″point design″ for an MIMD distributed shared-memory parallel computer capable of achieving gracious 100 TeraFLOPS performance with technology that will definitely become feasible/viable in less than a decade. Our design takes advantage of free-space optical technologies, with simple guided-wave concepts, to produce a 1-D building block (BB) that implements efficiently a large, fully-connected system of processors. A 2-D structure is proposed for the complete system, where the aforementioned 1-D BB is extended into two dimensions. With readily available technology, a mesh of clear plastic bars in our design facilitate bit-parallel transmissions that utilize wavelength-division multiplexing and follow dedicated optical paths. Each processor is mounted on a card. Each card contains eight processors interconnected locally via an electronic crossbar. Taking advantage of higher-speed optical technologies, all eight processors share the same interface to the optical medium. Another impressive property of our system is that its bisection bandwidth matches, within an order of magnitude, the performance of its computation engine. Our optical interconnection scheme is superior to other optical schemes because it is scalable, feasible, viable, fast, power efficient, point-to-point, and does not have an adverse effect on the system's size.

Original languageEnglish (US)
Pages363-370
Number of pages8
StatePublished - 1996
EventProceedings of the 1996 6th Symposium on the Frontiers of Massively Parallel Computing, Frontiers'96 - Annapolis, MD, USA
Duration: Oct 27 1996Oct 31 1996

Other

OtherProceedings of the 1996 6th Symposium on the Frontiers of Massively Parallel Computing, Frontiers'96
CityAnnapolis, MD, USA
Period10/27/9610/31/96

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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