Low-power multiplierless DCT for image/video coders

Byoung Il Kim, Sotirios G. Ziavras

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Scopus citations


A multiplierless discrete cosine transform (DCT) architecture is proposed to improve the power efficiency of image/video coders. Power reduction is achieved by minimizing both the number of arithmetic operations and their bit width. To minimize arithmetic-operation redundancy, our DCT design focuses on Chen's factorization approach and the constant matrix multiplication (CMM) problem. The 8x1 DCT is decomposed using six two-input butterfly networks. Each butterfly is for 2x2 matrix multiplication and requires a maximum of eight adders/subtractors with 13-bit cosine coefficients. Consequently, the proposed 8x1 DCT architecture is composed of 56 adders and subtractors, which represent a reduction of 61.9% and 46.1% in arithmetic operations compared to the conventional NEDA and CORDIC architectures, respectively. To further improve the power efficiency, an adaptive companding scheme is proposed. The proposed DCT architecture was implemented on a Xilinx FPGA. The results from power estimation show that our architecture can reduce the power dissipation by up to 90% compared to conventional multiplierless DCT architectures.

Original languageEnglish (US)
Title of host publication2009 IEEE 13th International Symposium on Consumer Electronics, ISCE 2009
Number of pages4
StatePublished - 2009
Event2009 IEEE 13th International Symposium on Consumer Electronics, ISCE 2009 - Kyoto, Japan
Duration: May 25 2009May 28 2009

Publication series

NameDigest of Technical Papers - IEEE International Conference on Consumer Electronics
ISSN (Print)0747-668X


Other2009 IEEE 13th International Symposium on Consumer Electronics, ISCE 2009

All Science Journal Classification (ASJC) codes

  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering


  • Constant matrix multiplication (CMM)
  • Discrete cosine transform (DCT)
  • Multiplierless DCT
  • Power dissipation


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