Herein, we propose LT-PIM as a Lookup Table-based Processing-In-Memory architecture leveraging the high density of DRAM to enable massively parallel and flexible computation. LT-PIM supports lookup table queries to execute complex arithmetic operations, such as multiplication via only memory read operation. In addition, LT-PIM enables bulk bit-wise in-memory logic by elevating the analog operation of the DRAM sub-array to implement Boolean functions between operands in the same bit-line. With this, LT-PIM enables a complete and inexpensive in-DRAM RowHammer (RH) self-tracking approach. Our results demonstrate that LT-PIM achieves ∼70% higher energy efficiency than the fastest charge-sharing-based designs and ∼32% over the best LUT-based designs. As for the RH self-tracking, with a worst-case slowdown of ∼0.2%, LT-PIM archives up to ∼80% energy-saving over the best designs.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- look-up table
- row hammer