Material identification algorithms for parallel systems

The direct binary hypercube interconnection network has been widely used in the design of parallel computer systems, because it has low diameter, and can effectively emulate commonly used structures such as binary trees, rings, and meshes. However, the hypercube has the disadvantage of high VLSI complexity due to the increase in the number of communication ports and channels per PE (processing element) with an increase in the dimension of the hypercube. This complexity is a major drawback of the hypercube because it limits its potential for scalability. Ziavras has introduced the reduced hypercube (RH) interconnection network. The RH reduces VLSI complexity without compromising performance. The RH is obtained from a regular hypercube by a uniform reduction in the number of edges for each hypercube node. The main objective of this paper is to demonstrate the feasibility of the RH in implementing material identification algorithms using X-ray fluorescence. Relevant algorithms are developed for the PRAM and the hypercube also, for comparative analysis. The algorithms rely heavily on the binary tree emulation capabilities of these systems. The results indicate that the RH is capable of providing hypercube-like performance at a significantly reduced complexity/cost.