@inproceedings{4515de11014a4e4a9d9e16abb4546e1c,
title = "Memory-memory-memory Clos-network packet switches with in-sequence service",
abstract = "Out-of-sequence is a problem faced by multi-stage buffered Clos-network switches. This paper proposes two buffered three-stage Clos-network packet switches that service packets in sequence and provide high switching performance. The proposed switches require short configuration times as compared to existing bufferless or partially buffered Clos-network switches. The proposed switches use time stamps assigned at the input modules to identify the order of packets in the switch. The switches use time-stamp monitoring mechanisms either at the input modules in a switch called the MMM-IM switch, or at the output modules in a switch called the MMM-OM switch to keep packets in sequence. Synchronization among different switch modules is not required in the proposed switches. The switching performance study presented in this paper shows that in-sequence monitoring at the IM provides higher performance and larger scalability than in-sequence monitoring at the output. Furthermore, the throughput of the MMM-IM switch is comparable to that of a switch that may service packets out of sequence.",
keywords = "Clos-network, buffered switch, iterative matching, memory-memory-memory switch, packet switches",
author = "Ziqian Dong and Roberto Rojas-Cessa and Eiji Oki",
year = "2011",
doi = "10.1109/HPSR.2011.5986014",
language = "English (US)",
isbn = "9781424484560",
series = "2011 IEEE 12th International Conference on High Performance Switching and Routing, HPSR 2011",
pages = "121--125",
booktitle = "2011 IEEE 12th International Conference on High Performance Switching and Routing, HPSR 2011",
note = "2011 IEEE 12th International Conference on High Performance Switching and Routing, HPSR 2011 ; Conference date: 04-07-2011 Through 06-07-2011",
}