Minimizing scheduling complexity with a Clos-network space-space-memory (SSM) packet switch

Chuan Bi Lin, Roberto Rojas-Cessa

Research output: Contribution to journalConference articlepeer-review

3 Scopus citations

Abstract

In this paper we propose a three-stage space-space-memory (SSM) Clos-network switch that uses crosspoint buffers in the third-stage modules to eliminate the need for performing multiple iterations in for port matching. We show that the proposed switch not only reduces the configuration complexity of space-space-space (S3) switches but also improves switching performance and relaxes configuration timing. We demonstrate these advantages by comparing the performance of the proposed switch using the weighted module-first no-port (WFM-NP) matching scheme to that of a S3 switch using the original scheduling scheme (with port matching). For higher utilization of the SSM switch, we propose the weighted central-module-link matching (WCMM) scheme. The WCMM scheme rescinds multiple iterations for module matching and yet, it achieves higher performance than the WFM-NP scheme. The advantages of the SSM switch are achieved without memory speedup. The memory addition is a small cost to trade for complexity reduction and performance improvement.

Original languageEnglish (US)
Article number6602284
Pages (from-to)15-20
Number of pages6
JournalIEEE International Conference on High Performance Switching and Routing, HPSR
DOIs
StatePublished - Dec 9 2013
Event2013 IEEE 14th International Conference on High Performance Switching and Routing, HPSR 2013 - Taipei, Taiwan, Province of China
Duration: Jul 8 2013Jul 11 2013

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Keywords

  • Clos-network switch
  • IM-CM iteration
  • crosspoint buffers
  • space-space-memory
  • switch scalability

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