NBTI effects in pMOSFETS with TiN/Hf-silicate based gate stacks

Effects of negative bias temperature instability (NBTI) on p-channel MOSFETS with TiN/HfSi_xO_y (20% SiO₂) based high-Κ gate stacks are studied under different gate bias and elevated temperature conditions. For low bias conditions, threshold voltage shift (ΔV_T) is most probably due to the mixed degradation within the bulk high-Κ. For moderately high bias conditions, H-species dissociation in the presence of holes and subsequent diffusion may be initially responsible for interface state and positively charged bulk trap generation. Initial time, temperature and oxide electric field dependence of ΔV_T in our devices conform to SiO₂ based reaction-diffusion (R-D) model of NBTI. Under high bias condition at elevated temperatures higher Si-H bond-annealing/bond-breaking ratio, due to the experimentally observed absence of the impact ionization induced hot holes at the interracial layer (IL)/Si interface, probably limits the interface state generation and ΔV _T as they quickly tend to saturate. copyright The Electrochemical Society.