Neuromorphic hardware accelerator for SNN inference based on STT-RAM crossbar arrays

Keyphrases

• 6-high 20%
• Accelerator Design 20%
• Binary Data 20%
• Compact Model 20%
• Computational Cores 20%
• Crossbar Array 100%
• Data Storage 20%
• Design Study 20%
• Digital Logic 20%
• Encoding Mechanism 20%
• Hardware Accelerator 100%
• High Performance 20%
• High-throughput 20%
• Human Brain 20%
• Instantiation 20%
• Inter-core Communication 20%
• Memory Array 20%
• Memristive Neural Networks 20%
• Multi-level States 20%
• Neural Network Accelerator 20%
• Neural Network Inference 100%
• Neuromorphic Hardware 100%
• Neurosynaptic Core 40%
• Non-volatile 20%
• Non-volatile Memory 40%
• On-chip Routing 20%
• Performance per Watt 20%
• Peripheral Circuits 20%
• Postsynaptic Density Protein 95 (PSD-95) 20%
• Processing Mechanism 20%
• Signal Encoding 20%
• Signal Processing 20%
• Spiking Neural Networks 100%
• Spiking Neurons 20%
• Spin-transfer Torque Magnetic RAM (STT-MRAM) 100%
• Technology Node 20%
• Time-based 20%
• Volatile STT-RAM 20%

Computer Science

• Experimental Result 33%
• Hardware Accelerator 100%
• High Throughput 33%
• Information Storage 33%
• Instantiation 33%
• Memory Array 33%
• Network Inference 100%
• Network Routing 33%
• Neural Network 100%
• Non-Volatile Memory 66%
• Nonvolatile 33%
• Signal Encoding 33%
• Synaptic Weight 33%