Abstract
We have successfully demonstrated a novel "pore" phase change memory cell, whose critical dimension (CD) is independent of lithography. Instead, the pore diameter is accurately defined by intentionally creating a "keyhole" with conformai deposition. Fully integrated 256kbit test chips have been fabricated in 180nm CMOS technology. We report SET times of 80ns, RESET currents less than 250μA, and accurate sub-lithographic CDs that can be less than 20% the size of the lithographically-defined diameter.
| Original language | English (US) |
|---|---|
| Article number | 4339743 |
| Pages (from-to) | 100-101 |
| Number of pages | 2 |
| Journal | Digest of Technical Papers - Symposium on VLSI Technology |
| DOIs | |
| State | Published - 2007 |
| Externally published | Yes |
| Event | 2007 Symposium on VLSI Technology, VLSIT 2007 - Kyoto, Japan Duration: Jun 12 2007 → Jun 14 2007 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
Keywords
- Chalcogenide
- NV memory
- PCRAM
- Pore