On test and characterization of analog linear time-invariant circuits using neural networks

Zhen Guo, Xi Min Zhang, Jacob Savir, Yun-Qing Shi

Research output: Contribution to journalConference articlepeer-review

5 Scopus citations

Abstract

Testing and characterization of analog circuits is a very important task in the VLSI manufacturing process. However, no efficient methodology exists on how to effectively model and characterize the various faults, and even how to detect their existence. Neural networks have been successfully applied to various pattern recognition problems. In this paper, the amplitude and temporal characteristics of the good circuit response are used to train a neural network, so that it is able to distinguish between different faulty circuit responses. A Time-Delay Neural Network (TDNN) is proposed as a possible vehicle for performing the test and diagnosis.

Original languageEnglish (US)
Pages (from-to)338-343
Number of pages6
JournalProceedings of the Asian Test Symposium
StatePublished - Dec 1 2001
EventProceedings of the 10th Asian Test Symposium - Kyoto, Japan
Duration: Nov 19 2001Nov 21 2001

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Keywords

  • Characterization
  • Fault detection
  • Neural network
  • System on a chip

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