On the tradeoff between number of clocks and number of latches in shift registers

Research output: Contribution to journalConference articlepeer-review

Abstract

This paper shows a new family of shift register designs which enjoys a reduced latch count. Reduction in the latch count is achieved by introducing additional clocks. The reduction in latch count may reach the ultimate savings of 50%.

Original languageEnglish (US)
Pages (from-to)296-299
Number of pages4
JournalProceedings of the Asian Test Symposium
StatePublished - Dec 1 1997
EventProceedings of the 1997 6th Asian Test Symposium - Akita, Jpn
Duration: Nov 17 1997Nov 19 1997

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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