TY - JOUR
T1 - Parallel DSP algorithms on TurboNet
T2 - An experimental system with hybrid message-passing/shared-memory architecture
AU - Li, Xi
AU - Ziavras, Sotirios G.
AU - Manikopoulos, Constantine N.
PY - 1996/6
Y1 - 1996/6
N2 - The paper presents several parallel DSP (digital signal processing) algorithms and their performance analysis, targeting a hybrid message-passing and shared-memory architecture that has been built at New Jersey Institute of Technology. The current version of our system contains eight powerful TMS320C40 processors. The algorithms are implemented on our system using message-passing only, shared-memory only, and, if possible, a combination of both of these parallel processing paradigms. Comparisons show that TurboNet's robust, hybrid architecture results in significant performance gains because of the flexibility it introduces.
AB - The paper presents several parallel DSP (digital signal processing) algorithms and their performance analysis, targeting a hybrid message-passing and shared-memory architecture that has been built at New Jersey Institute of Technology. The current version of our system contains eight powerful TMS320C40 processors. The algorithms are implemented on our system using message-passing only, shared-memory only, and, if possible, a combination of both of these parallel processing paradigms. Comparisons show that TurboNet's robust, hybrid architecture results in significant performance gains because of the flexibility it introduces.
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U2 - 10.1002/(SICI)1096-9128(199606)8:5<387::AID-CPE223>3.0.CO;2-I
DO - 10.1002/(SICI)1096-9128(199606)8:5<387::AID-CPE223>3.0.CO;2-I
M3 - Article
AN - SCOPUS:0030168393
SN - 1040-3108
VL - 8
SP - 387
EP - 411
JO - Concurrency Practice and Experience
JF - Concurrency Practice and Experience
IS - 5
ER -