The paper presents several parallel DSP (digital signal processing) algorithms and their performance analysis, targeting a hybrid message-passing and shared-memory architecture that has been built at New Jersey Institute of Technology. The current version of our system contains eight powerful TMS320C40 processors. The algorithms are implemented on our system using message-passing only, shared-memory only, and, if possible, a combination of both of these parallel processing paradigms. Comparisons show that TurboNet's robust, hybrid architecture results in significant performance gains because of the flexibility it introduces.
|Original language||English (US)|
|Number of pages||25|
|Journal||Concurrency Practice and Experience|
|State||Published - Jun 1996|
All Science Journal Classification (ASJC) codes