Partially reconfigurable vector processor for embedded applications

Muhammad Z. Hasan, Sotirios G. Ziavras

Research output: Contribution to journalArticlepeer-review

Abstract

Embedded systems normally involve a combination of hardware and software resources designed to perform dedicated tasks. Such systems have widely crept into industrial control, automotive, networking, and consumer products. These systems require efficient devices that occupy small area and consume low power. The device area can be minimized by reusing the same hardware for different applications. If possible, reconfiguring the hardware to adapt to the application needs is important for reducing execution time and/or power consumption. Partial reconfiguration facilitates minimum hardware changes to form a new configuration. We have designed a reconfigurable vector processor for embedded applications. Benchmark results on Xilinx FPGAs (Field-Programmable Gate Arrays) are presented involving partial reconfiguration for embedded applications that process vectors. Two approaches are studied toward performance evaluation. The first one estimates the required partial reconfiguration time based on the resources consumed by the corresponding vector kernels. The second approach uses the actual measurement of partial reconfiguration time on a platform that supports a particular type of partial reconfiguration. More than 20% performance improvement has been observed for benchmark kernels, without neglecting the reconfiguration overhead. A framework is proposed as well to efficiently manage the reconfiguration overhead for applications involving multiple kernels.

Original languageEnglish (US)
Pages (from-to)60-66
Number of pages7
JournalJournal of Computers
Volume2
Issue number9
DOIs
StatePublished - Jan 1 2007

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

Keywords

  • Embedded applications
  • FPGA- reconfiguration
  • Vector processing

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