Performance optimization of an FPGA-based configurable multiprocessor for matrix operations

Xiaofang Wang, Sotirios G. Ziavras

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations

Abstract

Several driving forces have recently brought about significant advances in the field of configurable computing. They have also enabled parallel processing within a single field-programmable gate array (FPGA) chip. The ever-increasing complexity of application algorithms and the supercomputing crisis have made this new parallel-processing approach more important and pertinent. Its cost-effectiveness provides system designers with the greatest flexibility while imposing many challenges to current hardware and software codesign methodologies. This paper explores practical hardware and software design and implementation issues for FPGA-based configurable multiprocessors, based on the authors' first-hand experience with a shared-memory implementation of parallel LU factorization for sparse block-diagonal-bordered (BDB) matrices. We also propose a new dynamic load balancing strategy for parallel LU factorization on our system. Performance results are included to prove the viability of this new multiprocessor design approach.

Original languageEnglish (US)
Title of host publicationProceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages303-306
Number of pages4
ISBN (Electronic)0780383206, 9780780383203
DOIs
StatePublished - 2003
Event2nd International Conference on Field Programmable Technology, FPT 2003 - Tokyo, Japan
Duration: Dec 15 2003Dec 17 2003

Publication series

NameProceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003

Other

Other2nd International Conference on Field Programmable Technology, FPT 2003
CountryJapan
CityTokyo
Period12/15/0312/17/03

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Software

Fingerprint Dive into the research topics of 'Performance optimization of an FPGA-based configurable multiprocessor for matrix operations'. Together they form a unique fingerprint.

Cite this