The No Slot Wasting Immediately Using the TAR bit (NSW_IUT) bandwidth balancing mechanism has been recently proposed for dual bus architectures. NSW_IUT is a variation of the No Slot Wasting Bandwidth Balancing (NSW_BWB) mechanism and it can also introduce bandwidth fairness into a DQDB network without wasting channel slots. In addition, it enables lightly loaded stations to use more effectively the TAR=1 bits they observe and improve considerably their delay performance. In this paper, we use simulation to carry out a thorough investigation of the delay performance of the NSW_IUT mechanism under a single and multiple priority classes of traffic as well as under the presence of erasure nodes. Throughout our study, we also compare NSW_IUT with NSW_BWB as well as with the bandwidth balancing of the IEEE 802.6 standard.
All Science Journal Classification (ASJC) codes
- Computer Science(all)
- Electrical and Electronic Engineering